The FPGA Programming Blockset is a Simulink® blockset for using a FPGA model created with a dSPACE system using the Xilinx® Vitis™ Model Composer HDL Library, the former Xilinx System Generator Blockset.
Support of MathWorks® HDL CoderTM for modeling parts of the FPGA model with Simulink® blocks
The FPGA Programming Blockset is a Simulink blockset for using a FPGA model created with a dSPACE system using the Xilinx® Vitis™ Model Composer HDL Library, the former Xilinx System Generator Blockset. It provides blocks for implementing the interface between the FPGA mounted on a dSPACE board and its I/O, and the interface between the dSPACE FPGA board and its computation node (CN).
The blockset can be used with the following dSPACE FPGA platforms, which provide user-programmable FPGAs:
Typical application scenarios for rapid control prototyping (RCP) and hardware-in-the-loop (HIL) simulation are:
The dSPACE FPGA platforms provide various cutting-edge Xilinx® FPGAs which can be programmed graphically with Xilinx Vitis™ Model Composer HDL Library in Simulink®.
The FPGA Programming Blockset lets you integrate the resulting FPGA design into a real-time application that runs on dSPACE hardware.
The blockset also gives you a convenient way to connect the I/O board’s I/O driver components and to model the connection to a processor-based computation node (SCALEXIO processing hardware, MicroLabBox, or MicroAutoBox). The data exchange supports fixed-point data types as well as floating-point data types.
To grant maximum freedom in developing FPGA applications, it is also possible to handcode the entire design using the handcode interface in VHSIC hardware description language (VHDL or Verilog). Alternatively, you can integrate handwritten IP cores into your Simulink FPGA model, or you can also use MathWorks® HDL CoderTM to model parts of the FPGA design.
With the FPGA blockset, you can synthesize, build, and program an FPGA or processor directly from Simulink for optimal convenience. During run time, you can access variables to trace or modify them, without having to modify the model. An FPGA scope even allows for an in-depth analysis of your design.
Optional Hardware | Boards and Variants |
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SCALEXIO |
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MicroAutoBox |
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MicroLabBox |
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Functionality | Description |
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General |
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FPGA interface |
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Handcode interface |
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I/O access |
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Processor-FPGA communication |
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Inter-FPGA communication between SCALEXIO FPGA base boards |
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Asynchronous tasks |
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Variable access |
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Remote FPGA build |
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Support of MathWorks® HDL CoderTM |
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