dSPACE provides various real-time components with FPGAs that can be freely programmed by using either hand code (HDL) or a block-oriented environment. This training course focuses on the block-oriented approach. based on Xilinx<sup>®</sup> Vitis<sup>™</sup> Model Composer HDL Library, the former Xilinx<sup>®</sup> System Generator (XSG) Blockset, is integrated directly in MATLAB®/Simulink® so that the procedure for modeling FPGA implementations for electric drives is similar to the process for modeling commonly used microprocessors.
The training course will equip you with the skills required for working with the dSPACE XSG Electric Components Library to embed electric drive applications on FPGA-based real-time hardware:
Because the training exercises contain elements from the dSPACE XSG Utils Library, you must already be familiar with this library (requirement: FPGA Basic Training).
Dates | Location and time | Fee per person |
June 20, 2024 | Paderborn (Germany), 9:00 AM to 5:15 PM | € 850 (plus tax) |
September 05, 2024 | Paderborn (Germany), 9:00 AM to 5:15 PM | € 850 (plus tax) |
November 07, 2024 | Virtual classroom training, 8:30 AM to 4:30 PM | € 850 (plus tax) |
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